岗位职责
JobDescription:Theverificationtasksincludeblocklevel,chiplevelverification,testplancreation,scripting,coverage,regressionrunetc..Requirements:ThecandidateispreferredtobeMSEEwithminimumof2+years,indigitalASIC/SOCdesignverification.Moreexperiencewillbeconsideredasseniorengineerorlead.ThecandidateshouldhavegoodunderstandingonASIC/SOCdesignflowandshouldhave:0.Familiarwithoneofmajorverificationlanguages:UVM,C,C++,SystemVerilog,Verilog1.Goodknowledgeofdesignverificationmethodology,suchasUVMorOVMandcoveragedrivenverificationmethodology2.Manyexperienceswithsimulationmodelcreationandthetestbenchbuild3.StrongRTLcodingwithVerilogandfamiliarwithfront-enddesignflow4.Backgroundinoneoftheareabelowwillbeastrongplus:a.StrongC/C++softwaredevelopmentexperiencesforARMbasedSoCsystemb.Video,display,GPU,DDR,PCIe,USBetc..5.Befamiliarwithscriptinglanguage,suchasPerl,Cshell,Makefile.职能类别：IC验证工程师关键字：c++uvmasicverificationrtlsocdesigntestplan
工作地址
成都-郫都区 （成都-郫都区成都高新综合保税区B区） 查看地图
请注意风险防范：任何企业让你交钱的行为都是诈骗！如有异常
工作推荐-简简
添加微信
